1. Field of the Invention
The present invention relates to a method and an apparatus for forming a patterned photoresist layer. More particularly, the present invention relates to a method and an apparatus for forming a patterned photoresist layer wherein an overlay offset is measured and fed back in real time.
2. Description of the Related Art
In accompany with the advances in semiconductor industry, numerous high-performance semiconductor apparatuses or integrated circuits including millions of devices like transistors, capacitors and resistors have been developed. To enhance the performance of a semiconductor apparatus or an integrated circuit, its integration degree has to be increased. More specifically, the number of conductive layers has to be increased and/or the critical dimension (CD) of devices has to be reduced.
Since the integration degrees of integrated circuits increase continuously, the alignment precision between different wafer layers becomes an important issue. For example, when misalignment occurs between conductive lines and plugs of an integrated circuit, the integrated circuit may have a low performance or even fail. Misalignment also occurs easily in doping or ion-implantation process lowering the performance of the integrated circuit.
Generally, the pattern of a film or doping/ion-implantation regions in a film in an integrated circuit is defined by a patterned photoresist layer formed in a lithography process including an exposure step and a development step. Therefore, it is necessary to measure the overlay offset of the patterned photoresist layer after the lithography process for detecting possible misalignment.
FIG. 1 illustrates a process flow for forming a patterned photoresist layer in the prior art. Referring to FIG. 1, a photoresist layer is coated on a wafer (S100), exposed using an exposure tool (S110) and then developed (S120) to form a patterned photoresist layer. The overlay offset between the photoresist patterns and another film is then measured (S130). The next step (S140) is to determine whether the overlay offset is within a tolerable range or not, i.e., whether the photoresist patterns are sufficiently aligned with other films or not. If the answer is yes, the next process is performed (S150). Otherwise, the photoresist layer is removed for rework, and a control signal is fed back to the exposure tool from the overlay measurement tool (S160) so that the exposure conditions in the rework can be adjusted accordingly.
In the prior art, the overlay measurement tool is usually an ACML (product name) tool. However, since the ACLM tool is used after the development step, the development liquid is wasted when a rework is required. Moreover, an ACLM tool cannot measure an overlay offset and feedback a control signal to the exposure tool in real time, so that the wafers processed before reception of the control signal have to be reworked when the overlay offset measured is not within the tolerable range. In addition, an ACML tool is usually quite expensive increasing the manufacturing cost. Furthermore, the use of an ACLM tool requires overlay marks being formed on the scribe line regions of a wafer, so that the scribe line regions cannot be further narrowed.